At a recent financial conference, AMD CTO Mark Papermaster was asked about reports of a memory bug in the company’s EPYC Genoa processors. This bug ostensibly requires a lengthy redesign/re-spin process to fix. His answer was a bit vague, so I contacted AMD for more information. The company denies memory bug claims, tom’s hardware All 4th Gen EPYC processors shipped to date fully support 2DPC memory configurations and do not require re-spins. Additionally, the company has already issued his BIOS update to OEM partners to enable support for his 2DPC configuration promised by the end of Q1 2023, with one supporting platform already in place. It is sold. AMD also shared other details that we’ll discuss below. But first, a bit of background information.
As you can see in our EPYC Genoa review, AMD’s new data center chips offer market-leading performance and feature some new interfaces. Support for 12 channels of DDR5 memory is one of the most important. However, Genoa was only launched with support for DDR5 memory in his 1 DIMM (1DPC) configuration per channel. This type of configuration only supports one memory stick attached to each of the 12 DDR5 memory controllers in the processor.
At launch, AMD will release a BIOS update in Q1 2023 to enable support for two memory DIMMs per channel (2DPC) and connect two memory sticks to each memory channel to increase capacity. said it can. As AMD further characterizes and tweaks its 2DPC memory configurations, it said it will release specifications for supported 2DPC memory speeds when an update becomes available.
in the meantime, semi-accurate (Partially Paywall) last month reported alleged issues with AMD’s Genoa processors. The report cites an unnamed industry source who claims Genoa has a bug in his memory subsystem, so AMD decided to buy more costly processors to support his 2DPC memory configuration. Had to embark on a respin. This inevitably leads to months of delays as the new chips go through the redesign and manufacturing process to perform well.
Unsurprisingly, a bug in the memory subsystem of the shipping chip will prevent the currently shipping Genoa processors from supporting the upcoming 2DPC specification. So, to determine if a new respin is needed, he asked AMD if all Genoa processors already in circulation will support 2DPC memory configurations at launch.
Additionally, AMD has on record that respins are not required for 2DPC support. Instead, the company states that 2DPC support only requires his BIOS update, which he has already issued to OEM customers.As a result, they are already designing motherboards with enough slots to support this feature. Transport CX GC68A-B8056 Supports 2DPC configurations.
The normal step-down in speed in 2DPC configurations drops Intel’s 8-channel Sapphire Rapids from DDR5-4800 in 1DPC to DDR5-4400 in 2DPC configurations. Genoa’s 2DPC speeds are expected to be slower than 1DPC speeds when the company releases its final specs, but it’s not yet known how much of a penalty will be incurred. It does list memory speeds, but it is said that this can vary from system to system. Not too bad considering the Genoa supports 50% more memory slots.
AMD also revealed that Papermaster’s comments at the recent Morgan Stanley investor conference were misunderstood. At the conference, Papermaster said: It’s a quarter, which is also an increase, but a much smaller number of this customer with two DIMMs per channel. AMD says that the “Lamp” comment refers to systems that support 2DPC configurations (requiring more physical slots), not to newer revisions of the processor.
Genoa’s support for 12 channels of DDR5 is the best on the market for x86 processors. Genoa has 50% more channels than Sapphire Rapids’ 8 and both chips support DDR5-4800 memory peaks in his 1DPC configuration. Intel has specified his 2DPC configuration with DDR5-4400, but as mentioned, AMD has yet to complete his 2DPC transfer speed certification. It is said that these may differ depending on the platform.
AMD’s decision to launch Genoa before finalizing 2DPC support is reasonable — it’s reasonable to expect demand for 2DPC configurations to be dramatically less than we’ve seen in the past. (certain rank configurations may slightly improve performance). But with 12 memory channels in a 1DPC configuration, AMD can support up to 3TB of memory per chip on his 256GB stick. This is sufficient for the widest user base. 2DPC support will increase that capacity to 6TB DDR5 per socket, but AMD is already facing space constraints cramming his 12 channels of memory into a regular 2-socket server.
As you can see in the Genoa test server image above, cramming a total of 24 DIMM slots in a 1DPC configuration already causes a lot of problems due to space constraints. Frankly, it’s hard to imagine cramming twice as many slots in a 2DPC configuration as in the picture. A dual socket server requires a total of 48 slots. As such, we believe that most 2DPC configurations are likely to be for single-socket servers or use a small number of channels on dual-socket servers. In fact, Tyan servers that list 2DPC support only have one socket.
There are already many challenges to enable 1DPC configuration for photography. In fact, AMD had to cram 12 slots into the chassis using special “skinny” memory slots for Genoa motherboards. AMD warned that with skinny slots and other measures for high-density placement, he’s had several incidents where lateral pressure when installing DDR5 DIMMs has caused the DIMM sockets to peel off the board. This is an edge case and doesn’t indicate a platform issue, but rather a challenge AMD is already facing with “just” 12 memory slots.
2DPC’s challenge isn’t just the space needed for more slots. As we’ve seen with DDR4 memory, per channel he said adding DIMMs would slow down memory speed and more channels would make things even more complicated.In addition, even if you have extra Sky As seen in the complex DDR4 and DDR5 support matrices of consumer platforms, using slots can reduce peak memory speeds. These issues are even more troubling with DDR5 as they are much more tolerant and require more complex motherboard designs with more layers and better materials, at a higher cost. This becomes even more difficult with the higher transfer rates required for next-generation memory. Market players are even predicting that support for 2DPC may end with the DDR6 standard.
AMD has said that it will release details about Genoa’s 2DPC support this month and will update you as soon as we know more.
