Contest Seeks Best AI-Generated Chip Designs
Last week, AI bots were used to write business letters and generate detailed 4-second videos. The next frontier is using AI to help design custom silicon for your project.that’s why Ebres (opens in new tab)A company that makes custom chips to order is hosting a contest to encourage manufacturers to design their own silicon with the help of AI.
Ebres Winner AI Generated Open Silicon Design Challenge (opens in new tab) The chip will be made for free, a process that typically costs its customers just under $10,000. The contest is now open and entries must be received by June 2nd.
How exactly do you use AI to design a chip? Believe it or not, ChatGPT and Google Bard can write Verilog code on command . Verilog is a HDL (Hardware Description Language) that can be used in the chip manufacturing process to describe important details about digital circuits and registers.
I asked Bard to write some sample code in Verilog and this is what I got. I’m not familiar enough with his Verilog to be able to tell if it’s good code.
Efabless hosts a platform for creating and acquiring a sample set of designed and manufactured open source chips. The company operates shuttles several times a year, allowing customers to ship their designs to the factory and return them months later. The company’s ChipIgnite program uses RISC-V cores, an automated design flow, and gives you a choice of 100, 300, or 1,000 engineering samples.
Once manufacturing is complete, a packaged die is provided and some parts are placed on an evaluation board that can be used for testing. You can then use the company’s open source tools to test your design and flash the firmware. The company charges him $9,750 for each chipIgnite project.
If you want to get started creating your own chip designs, sign up for a free account at Efabless and check out the company’s many resources and tutorials.this walkthrough video (opens in new tab) seems particularly useful.
Also, many of the open source designs people have created using Efabless project page (opens in new tab). These include a VGA sprite generator, a 10-bit DAC with analog neural networks, and a crypto mining SoC.
To be eligible for the AI Generated Open Silicon Challenge, participants must have at least Verilog of the AI-generated chip and must include all prompts or automated GPT session logs in their submission. However, validation can be done outside the AI environment. The design should be open source for anyone to reproduce and should be implemented using the OpenLane ChipIgnite flow.
Submissions will be judged by a panel of experts and winners will be announced on June 9, 2023. It’s not immediately clear from the rules how many winners there will be. All rules and procedures regarding entry are contest page (opens in new tab).