It’s no secret that Intel is preparing its 14th Gen Meteor Lake to rival the best CPUs.The chipmaker has already shared some feature sets for its upcoming Foveros packaged chips. Linux patch Meteor Lake is meant to feature an L4 cache, which is rarely used in processors.
The explanation from Linux patch “In MTL, GTs can no longer be assigned to LLCs, only CPUs. This calls for updating MOCS/PAT tables, in addition to adding support for ADM/L4 caches.”
The patch didn’t specify what “ADM” stood for. It could be a fancy marketing name for L4 cache. The code also did not expose the size of the ADM. Historically, Intel has used his 64MB or 128MB for Haswell’s eDRAM through Coffee Lake. At its Hot Chips 34 presentation, Intel shared the schematics for its Meteor Lake chips, which consist of four different tiles: CPU tiles, SoC tiles, IO extender tiles, and graphics tiles. The quartet sits on top of a large base tile that acts as an interposer.
Intel’s first implementation of eDRAM (embedded DRAM) was by Haswell and served as the L4 cache for CPUs and iGPUs. Chip makers continue this practice all the way to Coffee Lake. However, only a select few desktop and mobile chips took advantage of his eDRAM for a short period of time. Broadwell is the most famous architecture with eDRAM. From design he avoids L4 cache because chip makers usually have slow L4 cache.
The cache hierarchy spans from L1 to L4, but most processors stop at L3 because it gets slower as you go down the ranks. Lower-level caches are larger, so the chances of a cache hit are higher. The main problem is that accesses to lower caches such as L3 and L4 are slow. As such, there are very few scenarios where the L4 cache helps system performance, other than feeding the integrated graphics. However, according to some Linux patches, coelacanth dream L4 cache could make a comeback in Meteor Lake, as discovered by
The big question is where Intel will put the ADM/L4 cache. It’s possible that Meteor Lake’s base tile houses his L4 cache. For example, Ponte Vecchio’s bass tile comes with 144MB of his L2 cache, so there is precedent. Alternatively, an L4 cache could reside within his SoC tile, which would certainly account for that massive landscape.
Another exciting finding is that Intel appears to block Meteor Lake’s iGPU from accessing LLC (Last Level Cache). According to a developer note from Linux patch (opens in new tab)“In MTL, GT is no longer allocated to LLC. Set has_llc=0.”
LLC corresponds to the highest numbered cache on the processor that needs to access memory. L3 is typically LLC on most modern processors and is shared between the CPU cores and the iGPU. For example, Intel’s existing 13th Gen Raptor Lake chips feature up to 36MB of his L3 cache, a 20% improvement over the last 12th Gen Alder Lake parts. However, the Linux patch states that only Meteor Lake CPU cores can utilize LLC. The design is similar to AMD’s Ryzen APUs where the CPU cores and iGPU do not share the same cache.
A 12-core Meteor Lake processor recently appeared on the benchmark website. Sadly, the chip’s clock speeds and results are misreported, so we couldn’t really say how much it would perform better than Raptor Lake. It’s still unclear if it will be mobile-only like Lake, or if it’s coming to desktop. On the other hand, rumors about a possible Raptor Lake Refresh have been around for months, so the latter is far from unlikely.Ann Alleged Intel Documents (opens in new tab) Just confirming that Meteor Lake’s marketing name is 14th Gen Core doesn’t exactly dispel the rumors.
Meteor Lake should hit the retail market in the second half of this year. After that, 7nm chips will face stiff competition from AMD, including Dragon Range (Zen 4 + RDNA 2), Phoenix (Zen 4 + RDNA 3) and updated Rembrandt-R and Barcelo-R chips.
