Loongson has reportedly released the first Linux patch to enable support for next-generation 3A6000 series processors phonics. The company expects his upcoming LoongArch-based CPU, AMD’s Zen 3, to feature Per-Clock Instructions (IPC), which he believes will help Loongson compete against the big processor makers. will be
Loongson shared details about the progress of the 3A6000 series CPU development last November, revealing that the design phase of the project is finished and processor samples will be available in the first half of 2023.
The company’s engineers are now posting patch The 3A6000’s new Memory Management Unit (MMU) or Page Table Walker (PTW) can be enabled to handle address translation exceptions (TLBI, TLBL, TLBS, TLBM, etc.) directly in hardware, improving performance. The CPU only needs software processing in situations such as page faults.
Another feature enabled by another patch Loongson’s 3A6000 processor has moved from full completion barrier (dbar 0) hints to a more fine-tuned set of hints for various memory barriers, which improves performance.
Enabling a CPU in Linux is an important milestone in the processor development cycle as it indicates that development is progressing. Enabling alone doesn’t necessarily mean the new chip is about to be obsoleted or is progressing rapidly, but it does at least mean that the designers are confident enough about its success. .
IPC performance comparable to AMD’s Zen 3 microarchitecture or Intel’s Tiger Lake microarchitecture means a lot to Loongson, whose current CPUs are significantly slower than processors from major suppliers. On the other hand, it should be noted that IPC alone does not necessarily mean that Loongson’s 2nd Gen CPUs, which rely on the LoongArch microarchitecture, will be as fast as AMD’s Ryzen 5000 series and Intel’s 11th Gen Core processors. there is. Clock speed and other aspects of the platform also play a role.
