Samsung Kicks Off DDR5 DRAM Production on 12nm Process Tech, DDR5-7200 in the Works
Samsung announced Thursday that it has started mass production of DRAM chips on its latest 12nm manufacturing process. The new manufacturing node has allowed Samsung to reduce the power consumption of his DRAM devices, significantly lowering costs compared to previous generation nodes.
Samsung has announced that its 12nm manufacturing process is being used to produce 16Gbit DDR5 memory chips. The company already produces his DDR5 chips of that capacity (such as the K4RAH086VB-BCQK), but his switch to the newer and smaller 12nm process has paid off in terms of both power consumption and die size. increase. Compared to DDR5 dies manufactured at the company’s previous-generation node (14nm), the new 12nm dies consume up to 23% less power, allowing Samsung to produce 20% more dies per wafer (i.e. DDR5 dies are Visibly better) small).
According to Samsung, a key innovation in its 12nm DRAM manufacturing process is the use of a new high-k material for the DRAM cell capacitors, which increases the cell’s capacitance without increasing dimensions or die size. performance was improved. The higher capacitance of the DRAM cells means that the DRAM cells can store more data, reducing power-consuming refresh cycles and thus improving performance. However, larger capacitors typically result in larger cell and die sizes, resulting in higher die costs.
DRAM makers have addressed this issue by using High-K materials for many years, but memory makers also have to consider yield and their own production infrastructure, so these materials are used every time a new node comes out. becomes difficult to find. Apparently Samsung has done this with the 12nm node, but has not disclosed anything about it. Analog components such as capacitors were some of the first parts of the chip to stop further scaling down at finer process nodes, so Samsung’s success in significantly shrinking the die size is very notable. Worth it.
Along with introducing new High-K materials, Samsung has also reduced the operating voltage and noise of its 12nm DDR5 ICs, improving the balance between performance and power consumption compared to its predecessors.
One aspect about Samsung’s 12nm DRAM technology is that it appears to be the company’s trio of technologies.rd Generative production node for memory using extreme ultraviolet lithography. The first his D1x node was designed purely as a proof of concept and his successor D1a which has been in use since 2021 used his EUV for his five layers. Meanwhile, it is unclear to what extent Samsung’s 12nm node uses EUV tools.
“Using differentiated process technology, Samsung’s industry-leading 12nm-class DDR5 DRAM delivers superior performance and power efficiency,” said Jooyoung, Executive Vice President of DRAM Products and Technology at Samsung Electronics. Lee said.
Meanwhile, Samsung is also eyeing faster memory speeds with its new 12nm DDR5 die. According to the company, these dies will allow him to run at speeds equivalent to DDR5-7200 (i.e. 7.2Gbps/pin), which is now significantly higher than the speeds allowed by his official JEDEC specs. Exceeded. It doesn’t specify the required voltage, but at least it gives us some hope for his future XMP/EXPO memory kits.
