in an interview with gamers nexus, AMD’s Amit Mehra and Bill Alverson on the origins of AMD’s 3D-VCache technology and how it ended up in mainstream Ryzen consumer desktop platforms, including the best CPUs for gaming. shared. During a discussion with Gamer Nexus’ Steve Burke, the two showed off AMD’s first prototypes of his Ryzen 3D-VCache parts, including his 12-core and 16-core models with dual CCD 3D-VCache designs. bottom.
AMD’s insight highlights the fact that the company was indeed looking to produce a high core count Ryzen 5000 part with 3D-VCache technology as many enthusiasts have theorized. It also confirms that AMD was not architecturally limited to building only 8-core designs, and had the physical capacity to produce multi-CCD 12-core and 16-core Ryzen 5000X3D chips as needed. increase.
According to AMD’s Amit Mehra, the desktop implementation of AMD’s 3D-VCache technology started by chance. The original implementation was designed specifically for servers and AMD was initially only testing his 3D-VCache iteration of EPYC server CPUs.
The reason AMD chose to research the 3D-Vcache feature on Ryzen in the first place is probably due to an “accident” that happened during the production of the prototype Epyc 3D-VCache chips, which resulted in 7 CCDs in a batch. is left unusable. The EPYC CPU required 8 CCDs at the time, so it was put on the EPYC chip.
This led Mehra and colleagues to repurpose a die with seven V-caches for desktop and build multiple designs including 8, 12 and 16 core variants. This is what prompted AMD to study the capabilities of his 3D-VCache in desktop workloads, discover his incredible gaming performance provided by V-Cache, and give birth to the Ryzen 7 5800X3D.
AMD showed gamers two high core count Zen 3 X3D prototypes, including a 16 core model and a 12 core model with 3D-VCache on both CCDs. The chip was fully functional actively within Windows and on screen he was shown actively running the AIDA64 stress test. Bill Alverson gave a glimpse of the chip’s specs in Task Manager, revealing his massive 192MB of L3 cache on both CPUs thanks to the “Dual 3D-VCache” implementation.
Alverson and Mehra didn’t reveal the exact reason why AMD won’t ship the 12-core and 16-core Ryzen 5000X3D CPUs, but 3D-VCache on Ryzen CPUs with two CCDs has a significant latency penalty. , highlighted its shortcomings. This happens when two CCDs communicate with each other through the Infinity Fabric and negates any potential advantage 3D-VCache has when an application utilizes both CCDs.
Clearly at the time AMD wasn’t considering hybrid users who needed a high core count X3D chip for work or play, but that’s what they had in mind and they fixed it with the release of the Ryzen 9 7950X3D and 7900X3D. It was done. .
