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Low Power FinFET For Everyday Chips

Intel Foundry Services (IFS) this week soft-launched its new Intel 16 process technology, a 16nm-class node used to produce low-power chips for everyday workloads. Derived from Intel’s existing 22FFL process technology, the latest legacy node is aimed at cost-conscious customers who are making simple chips that don’t need the performance offered by leading-edge process nodes. Low-cost nodes like the Intel 16, which are set to compete with nodes like TSMC’s N12e, are typically widely used in a variety of fields, from aerospace and defense to his IoT and wireless. increase.

First revealed by Intel a few years ago, the launch of Intel 16 comes as IFS expands its foundry offerings to offer the full range of process nodes chip designers have come to expect from contract fabs. . While not at the forefront of the fab debate as the leading edge node, the leading edge mature process node is still used to produce huge numbers of chips each year and is often upgraded. It’s a simple chip that needs very little and may end up being in production for several years. over ten years.

TSMC makes about 25% of its revenue by manufacturing hundreds of millions of chips using the 40nm node and beyond. For other foundries, 40nm and similar process technologies have an even higher revenue share, with SMIC and UMC earning over 80% of his revenue at mature nodes. The life cycle of these chips is very long and TSMC is struggling to convince customers to start using 28nm, given the importance of the chips in the overall chip ecosystem and the IFS’ It emphasizes the need to provide cheaper, less advanced nodes suitable for and their designers.

The Intel 16 node at IFS targets a wide range of applications including application processors, analog, consumer electronics radio frequency (such as Wi-Fi and Bluetooth), mmWave, storage, military, aerospace and government chips. increase. This FinFET-based technology is designed to reach a performance and cost optimum, providing significant transistor density and high performance through the use of FinFETs while allowing EUV machines and multi-patterning to operate at high speeds. Costs much lower than state-of-the-art nodes. cost up. Intel says its 16nm-clss technology will require fewer masks and relatively simple back-end design rules. Essentially we’re looking at Intel’s cost optimized integration of his 22nm node with his 14nm node and without adopting some of the more expensive aspects of 14nm he made 22FFL a bit more move forward.

Most of this week’s announcements are focused on the new node’s chip design. Leading electronic design automation (EDA) and IP providers — Ansis, Cadence, Siemens EDAand synopsis — both announced their support of Intel 16 Process Technologies with certified software flows and IP. For example, Cadence has ported a set of IP blocks including PCIe 5.0 to Intel 16. 25G-KR Ethernet Multiprotocol PHY. Multiprotocol PHY for consumer applications supporting standards such as PCIe 3.0 and USB 3.2. Multi-standard PHY for LPDDR5/4/4X memory. His MIPI D-PHY v1.2 for cameras and displays. Additionally, Synopsys also has his AI-enabled toolkit, which now supports Intel 16.

Now that the necessary tools are in place, chip designers can start developing chips in IFS’ 16nm-class manufacturing technology using design, verification and simulation tools. At this time, it’s unclear when Intel plans to start manufacturing chips on the Intel 16 process, but it’s based on mature designs, so it could be a question of when the first customer chip designs will be ready. there is.

Source: Intel, Ansis, Cadence, Siemens EDAand synopsis.

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