According to DigiTimes, TSMC is accelerating orders to back-end equipment suppliers as it launches plans to expand its chip-on-wafer-on-substrate (CoWoS) packaging capabilities. Nvidia’s major monopoly on computing GPUs for artificial intelligence and high-performance computing is largely due to TSMC’s limited production capacity for his CoWoS packages.
Reports suggest that TSMC plans to increase CoWoS capacity from current 8,000 wafers per month to 11,000 wafers per month by the end of 2023, and to approximately 14,500-16,600 wafers by the end of 2024. It has been. It was previously rumored that Nvidia would increase CoWoS capabilities. Please note that the information is from unofficial sources and may be inaccurate.
Tech giants such as Nvidia, Amazon, Broadcom, Cisco, and Xilinx are all driving demand for TSMC’s advanced CoWoS packaging, consuming every wafer they can get their hands on. As a result, TSMC was forced to update orders for necessary equipment and materials, according to DigiTimes. AI server production has increased significantly, creating an already intense demand for these advanced packaging services.
Nvidia has already reserved 40% of TSMC’s available CoWoS capacity for next year. However, due to severe shortages, Nvidia has begun considering options with secondary suppliers, placing orders with Amkor Technology and United Microelectronics (UMC), although these orders are relatively small, the report said. claim.
To meet the growing needs of CoWoS packaging, TSMC has partnered with global manufacturers such as US-based Rudolf Technologies, Japan’s Disco, Germany’s SUSS MicroTec, Taiwan’s Expert Grand Process Technology (GPTC) and Scientec. We partner with several suppliers in Suppliers are under pressure to deliver around 30 sets of relevant tools by mid-2024.
TSMC has also begun implementing strategic changes, such as redistributing some of its InFO production capacity from its Longtan base in northern Taiwan to the Taiwan Science Park (STSP) in southern Taiwan. In addition, the expansion of the Ryutan site is proceeding at a rapid pace. Additionally, TSMC is expanding its own CoWoS production while outsourcing some of its OS manufacturing to other assembly and test (OSAT) companies. For example, Siliconware Precision Industries (SPIL) is one of the beneficiaries of this outsourcing initiative.
TSMC is Advanced backend Fab 6 facility last week. We plan to expand our advanced packaging capabilities with front-end 3D stacking SoIC (CoW, WoW) technology and back-end 3D packaging methods (InFO, CoWoS). At the moment, Fab is ready for his SoIC. Advanced Backend Fab 6 has more cleanroom space than all of TSMC’s other advanced packaging facilities combined, is capable of processing approximately one million 300 mm wafers per year, and performs over 10 million hours of testing per year. Yes.
One of the Advanced Backend Fab 6’s most impressive features is its extensive 5-in-1 intelligent automated material handling system. The system controls the production flow and instantly detects defects to improve yield. This is very important for complex multi-chiplet assemblies like AMD’s MI300. A defective packaging would immediately render all chiplets unusable, leading to significant losses. With 500 times faster than average data processing capabilities, the facility maintains comprehensive production records and tracks every mold it processes.
Nvidia uses CoWoS for its highly successful A100, A30, A800, H100, and H800 computing GPUs. AMD’s Instinct MI100, Instinct MI200/MI200/MI250X and upcoming Instinct MI300 will also use his CoWoS.
