Considering the buzz around AI and the reputation of the 7040 series Phoenix APUs, it was only a matter of time before AMD’s newest additions to take advantage of the latest AI processing cores. Again, AMD seems to have opted to build the highest performing, highest Average Selling Price (ASP) part first. But it was inevitable that AMD would trickle down the Zen 4 + RDNA 3 + XDNA AI Phoenix processing package onto an additional smaller chip.So if leaked photos No matter how you look at it, AMD’s upcoming Phoenix series chips will have significantly lower performance compared to the 7040U that the company announced just two months ago.
of Phoenix 2 is said to be a smaller chip It offers the same feature set as the original at a lower price. However, that price reduction can only be achieved in one direction, by reducing the silicon area dedicated to processing resources while leaving the functionality and design of the chip intact. This move reduced the silicon area of the Phoenix 2 by about 23%, taking the die area from 178 mm2 to just 137 mm2.
Unfortunately, these reductions can result in significant performance degradation. Phoenix 1 could support up to 8 cores / 16 threads (Zen 4) and 8-12 CUs, while Phoenix 2 seems to go up to 6 cores. Even more significant reductions are expected for GPUs, with only 4 CUs versus up to 12 CUs available for Phoenix.
Die area savings definitely impact performance with over 23% area savings. With a 25% reduction in CPU resources and a whopping 66% reduction in GPU resources, there is no way around this. Phoenix 2 will likely be sold under the Ryzen 5 and Ryzen 3 brands instead of Ryzen 7, with model names such as “Ryzen 5 7540U” and “Ryzen 3 7340U”.
While searching for information elsewhere on the internet, Detective Nemez (@GPUsAreMagic) took to Twitter to try to shed some light on the exact components of the Zen 4 CPU. Through perseverance, CPU design knowledge, and a thermopylai-like sense of duty, Nemez managed to more or less confine Zen 4’s hardware design to its essential elements. L1 and L2 cache repositories (keep data close to the CPU’s execution units so it can be retrieved more quickly); scheduler (frees CPU from bottlenecks and stalls when information is not where it should be when needed) try). Branch predictor…
Well, #siliconang has been busy, so I’ll end with my take on the Zen 4 core floorplan. The BPU continues to grow, and there’s also been an interesting FPU rearrangement from Zen 3. Someday, TSV will count too 🙃 Photo credit: @FritzchensFritz pic.twitter.com/0U59YAOOvaJune 26, 2023
The die shot also shows how much die area is allocated to “non-CPU cores”. It can be hard to understand how much logic is built into modern processors, especially when the marketing department is trying to keep things as “simple” as possible. Only cores, threads, or (forbidden to go back there again) frequencies are mentioned. But none of these pieces work without the rest of the “supporting” (yet essential) hardware.
So it looks like AMD is readying a smaller version of its Phoenix CPU and putting the XDNA AI processing unit in the lower tier processor. AMD had little choice but to reduce Phoenix 2’s processing resources in order to reduce area (and therefore cost).