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PCI Express 7.0 Spec Targets 512 GB/s for x16 Slot in 2027

The PCI-SIG released version 0.3 of its PCI Express 7.0 specification on Tuesday, demonstrating an important achievement of the technology that boosts PCIe data transfer speeds to 128 GT/s. This interim release signifies that members of the organization have agreed on the key features and architecture of the upcoming technology.

PCIe 7.0 is set to boost the data transfer rate on each pin to 128 GT/s, a significant improvement over PCIe 6.0’s 64 GT/s and PCIe 5.0’s 32 GT/s. This means that a 16-lane (x16) connection can support 512 GB/s of bi-directional bandwidth before accounting for encoding overhead. To improve data transfer speed and bandwidth, the PCIe Gen7 interface is configured to use 4-level pulse amplitude modulation (PAM4) signaling, 1b/1b flit mode encoding, and forward error correction (FEC). increase. The standard inherits from PCIe Gen6.

(Image credit: PCI-SIG)

PCI-SIG has a very precise specification development process consisting of multiple releases/checkpoints. Version 0.3 is generally lacking in detail, but gives an overview of the intended purpose and how to achieve it. As for PCIe 7.0, the main goals include a data transfer rate of 128 GT/s and a physical solution to ensure reliable and energy efficient data transmission at this speed.

We know that the technology relies on PAM4, flit mode and FEC, but the details regarding the PCIe Gen7 implementation look particularly interesting. The transition to PCIe 7.0, like previous transitions to PCIe 4.0 and 5.0, will require shorter PCIe traces due to the increased signaling speed. This reduces the permissible distance between root and endpoint devices such as CPUs and expansion cards (graphics cards, accelerators, SSDs, network cards) without components such as retimers. At the moment, we know that PCIe Gen5 implementations require thicker PCBs and higher quality materials, which means higher costs and prices. However, I’m not sure about PCIe Gen7 cost considerations in this regard.

PCI-SIG

(Image credit: PCI-SIG)

PCI-SIG itself introduced PCIe 7.0 to support bandwidth-hungry applications such as 800G Ethernet, AI/ML, cloud and quantum computing, hyperscale data centers, HPC, edge, and aerospace/military. Note that it clearly states that it is in development. PCIe 7.0 is sure to end up in client PCs, but the PCI-SIG never mentions desktops or laptops.

“PCI Express technology leads the industry as the foundational I/O interconnect, being used in everything from automobiles to data center servers,” said PCI-SIG President Al Yanes. increase. “As the speed of the PCIe architecture increases, we will continue to expand our traditional verticals while also expanding into exciting new verticals to meet the demand for high-bandwidth, low-latency interconnects. increase.”

PCI-SIG

(Image credit: PCI-SIG)

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